Cadence Software Engineer II Recruitment 2026: Apply Online

• Design and implement EDA algorithms: Build and refine CTS algorithms in C/C++, with a focus on performance, quality of results (QoR), scalability, and correctness across diverse chip design scenarios.
• Debug, optimise, and enhance CTS capabilities: Identify and resolve performance bottlenecks and robustness issues within the Innovus platform, improving reliability and runtime efficiency.
• Develop AI-driven and automated workflows: Apply emerging agentic and data-driven approaches to explore design trade-offs, reduce manual effort, and improve the adaptability of physical design flows.
• Explore adaptive techniques for physical design: Investigate and prototype data-informed methods that improve tool reliability and design outcomes across varying chip architectures.
• Collaborate with global R&D teams: Partner with engineers and researchers across Cadence’s worldwide offices to align on technical direction, share findings, and contribute to roadmap development.
• Communicate technical work clearly: Document algorithms, design decisions, and experimental findings through code reviews, written summaries, and team discussions.
• Stay current with the field: Actively engage with advances in algorithms, AI/ML, and EDA research to bring new thinking into the team’s work.

Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality.